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esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 1/14 dual, high-psrr, low-noise, low-dropout, 300ma cmos linear regulator general description the emp2033 series is a family of dual-channel cmos linear regulators featuring ultra-high power supply rejection ratio (psrr), low output voltage noise, low dropout voltage, low quiescent current and fast transient response. it guarantees delivery of 300ma output current per regulator, and supports preset output voltages ranging from 1.2v to 3.3v with 0.1v increment (except for 1.85v and 2.85v). the emp2033 is well suited for portable battery-powered application which requires high efficiency, low noise and small board space. with 150mv low dropout voltage at 300ma output current, emp2033 sustains high psrr at very low input voltage which is common in battery-powered application. the emp2033 also features 120v rms low output voltage noise without the presence of a noise bypass capacitor, which fits the application where noise and board space are both concerned. each regulator in the emp2033 can be turned off independently, further prolonging the battery life. internally build-in thermal protection and over-current protection provide additional safety for the end use. the emp2033 is available in miniature 6-pin sot-23-6, 6-pin fbp and tdfn (2x2) packages. features ? miniature sot-23-6 and tdfn-2x2-6 packages ? 300ma guaranteed output current ? 72db typical psrr at 1khz (60db typical at 10khz) ? 120v rms output voltage noise (10hz to 100khz) ? 150mv typical dropout at 300ma ? 150a typical quiescent current ? less than 1 a typical shutdown mode ? auto-discharge during chip disable ? fast line and load transient response ? 30s typical turn-on time ? 2.5v to 5.5v input range ? stable with small ceramic output capacitors ? over temperature and over current protection ? 2% output voltage tolerance applications ? wireless handsets ? pcmcia cards ? dsp core power ? hand-held instruments ? battery-powered systems ? portable information appliances ? typical application diagram ? typical performance characteristics psrr (db) frequency (hz) psrr vs. frequency emp2033
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 2/14 connection diagrams sot-23-6 order information emp2033-xxvc06grr/nrr xx output operation vc06 sot-23-6 package grr rohs (pb free) rating: -40 to 85c package in tape & reel nrr rohs & halogen free (by request) rating: -40 to 85c package in tape & reel tdfn-6 emp2033-xxfe06nrr xx output operation fe06 tdfn-6 package nrr rohs & halogen free rating: -40 to 85c package in tape & reel name sot-23-6 tdfn2x2 function out2 1 6 output voltage feedback of regulator 2 grnd 2 5 ground pin . out1 3 4 output voltage feedback of regulator 1 en1 4 3 enable input of regulator 1. set regulator 1 into the disable mode by pulling the en1 pin low. to keep regulator 1 on during normal operation, connect the en1 pin to vin. the en1 pin must not exceed vin under all operating conditions. vin 5 2 supply voltage input . require a minimum input capacitor of close to 1f to ensure stability and sufficient decoupling from the ground pin. en2 6 1 enable input of regulator 2. set regulator 2 into the disable mode by pulling the en2 pin low. to keep regulator 2 on during normal operation, connect the en2 pin to vin. the en2 pin must not exceed vin under all operating conditions. note: en1 and en2-pin can?t be floating
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 3/14 order, mark & packing information no. of pin en1 en2 package marking vout1 vout2 product id 3.0 3.0 emp2033-00vc06grr 1.8 3.0 emp2033-01vc06grr 1.8 2.8 emp2033-02vc06grr 2.5 3.3 emp2033-03vc06grr 2.8 3.3 EMP2033-04VC06GRR 1.8 3.3 emp2033-05vc06grr 2.85 2.85 emp2033-06vc06grr 1.5 2.8 emp2033-07vc06grr 1.2 2.8 emp2033-11vc06grr 6 y y sot-23-6 1.5 2.5 emp2033-12vc06grr 3.0 3.0 by request 1.8 3.0 by request 1.8 2.8 by request 2.5 3.3 by request 2.8 3.3 by request 1.8 3.3 by request 2.85 2.85 by request 1.5 2.8 by request 1.2 2.8 emp2033-11fe06nrr 6 y y tdfn-6 1.5 2.5 by request packing : sot-23-6 tape & reel 3kpcs tdfn-6 tape & reel 3kpcs
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 4/14 absolute maximum ratings (notes 1, 2) vin, v out1 , v out2 , v en1 , v en2 -0.3v to 6.5v power dissipation (note 3) storage temperature range -65c to160c junction temperature (tj) 150c lead temperature (10 sec.) 260c esd rating hbm (note 5) 2kv mm 200v thermal resistance ( ja ) tdfn-2x2-6 (note 3) sot-23-6 250c/w operating ratings (note 1, 2) temperature range -40c to 85c supply voltage 2.5v to 5.5v electrical characteristics unless otherwise specified, all limits guaranteed for v in = v out +1v (note 6), v en1 = v en2 = vin, c in = c out = 2.2f, t j = 25c. boldface limits apply for the operating temperature extremes: -40c and 85c. symbol parameter conditions min typ (note 7) max units v in input voltage 2.5 5.5 v -2 +2 v otl output voltage tolerance i out = 30ma v in = v out (nom) +1v, (note 6) -3 +3 % of v out (nom) i out maximum output current average dc current rating 300 ma i limit output current limit 600 ma i out1 = i out2 = 0ma 150 225 supply current i out1 = i out2 = 300ma 250 i q shutdown supply current en1 = en2 = gnd 0.001 1 a i out = 30ma 15 31 i out = 100ma 50 v do dropout voltage (note 4), (note 6) i out = 300ma 150 316 mv f = 1khz 72 f = 10khz 60 power-supply rejection ratio vin=4.0v, v out =3.0v i out =150ma f = 100khz 43 f = 1khz 70 f = 10khz 57 psrr power-supply rejection ratio vin=3.3v, v out =3.0v i out =30ma f = 100khz 42 db line regulation i out = 30ma, (v out + 1v) v in 5.5v, (note 6) -0.1 0.01 0.1 %/v 1ma i out 100ma 6 v out load regulation 1ma i out 300ma 20 mv e n output voltage noise v out =2.8v, i out = 30ma, 10hz f 100khz (note 8) 120 v rms v ih , (v out + 0.5v) v in 5.5v (note 6) 1.2 v en enable input threshold v il , (v out + 0.5v) v in 5.5v (note 6) 0.4 v
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 5/14 thermal shutdown temperature 170 t sd thermal shutdown hysteresis 30 t on turn-on time v out at 95% of final value 30 s t off turn-off time i out =0ma (note 9) 2.4 ms note 1: absolute maximum ratings indicate limits beyond which damage may occur. electrical specifications are not applicable when the device is operated outside of its rated operating conditions. note 2: all voltages are defined and measured with respect to the potential at the ground pin. note 3: maximum power dissipation for the device is ca lculated using the following equations: ja a t - j(max) t d p = where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction-to-ambient thermal resistance. e.g. for the sot-23-6 package ja = 250c/w, t j(max) = 150c and using t a = 25c, the maximum power dissipation is found to be 500mw. the derating factor (-1/ ja ) = -4mw/c, thus below 25c the power dissipation figure can be increase d by 4mw per degree, and similarity decreased by this factor for temperatures above 25c. the value of the ja for the dfn package is specifically dependent on the pcb trace area, trace material, and the number of layers and thermal vias. note 4: dropout voltage is measured by reducing v in until v out drops 100mv from its nominal value at v in -v out =1v. dropout voltage does not apply to the regulator versions with v out less than 2.5v. note 5: human body model: 1.5k in series with 100pf. note 6: condition does not apply to input voltages below 2.5v since this is the minimum input operating voltage. note 7: typical values represent the most likely parametric norm. note 8: for different output voltage, the noise can be appr oximately calculated using the following formula: note 9: turn-off time is time measured between the enable input just decreasing below v il and the output voltage just decreasing to 10% of its nominal value. ) ( 42 rms out v v noise =
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 6/14 functional block diagram
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 7/14 typical performance characteristics unless otherwise specified, vin = v out (nom) + 1v, c in = c out = 2.2f, t a = 25c, v en1 = v en2 = vin. psrr (db) psrr (db) psrr vs. frequency frequency (hz) psrr vs. frequency frequency (hz) psrr (db) psrr vs. frequency psrr (db) psrr vs. frequency frequency (hz) frequency (hz) psrr (db) psrr vs. frequency frequency (hz) psrr (db) psrr vs. frequency frequency (hz)
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 8/14 typical performance characteristics unless otherwise specified, vin = v out (nom) + 1v, c in = c out = 2.2f, t a = 25c, v en1 = v en2 = vin. (continued) ground current ( a) v out deviation (%) ground current vs. vin vin (v) line regulation vin (v) temperature stability ambient temperature ( o c) output voltage (v) dropout voltage vs. load current ( f o r diff e r e nt t e m pe r a t u r e) load current (ma) dropout voltage (mv) v out =2.8v, i out =100ma v out (10mv/div) vin (v), tr=tf=10 s 40 s/div line transient 4.8 3.8 load transient v in =3.8v, i out1 =10ma~120ma v out1 (50mv/div) v out2 (10mv/div) i out1 (50ma/div) 40 s/div
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 9/14 typical performance characteristics unless otherwise specified, vin = v out (nom) + 1v, c in = c out = 2.2f, t a = 25c, v en1 = v en2 = vin. (continued) 20 s/div v en (1v/div) v out (2v/div) enable response vin=3.8v, i out =0ma 2ms/div v en (1v/div) v out (2v/div) disable response vin=3.8v, i out =0ma 20 s/div v en (1v/div) v out (2v/div) enable response vin=3.8v, i out =50ma 200 s/div v en (1v/div) v out (2v/div) disable response vin=3.8v, i out =50ma
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 10/14 physical dimensions sot-23-6 o 2 symbpls min. nom. max. a 1.45 a1 0.15 a2 0.9 1.15 1.3 b 0.3 0.5 c 0.08 0.22 d 2.90 bsc. e 2.80 bsc. e1 1.60 bsc. e 0.95 bsc e1 1.90 bsc l 0.3 0.45 0.6 l1 0.60 ref l2 0.25 ref 0 4 8 2 5 10 15 unit: mm
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 11/14 tdfn-6 common dimensions millimeter dimensions inch symbol min. nom. max. min. nom. max. a 0.70 0.75 0.80 0.027 0.029 0.031 a3 0.200 ref 0.008 ref b 0.25 0.30 0.35 0.010 0.012 0.014 d 2.00 bsc 0.079 bsc d2 1.20 1.30 1.40 0.046 0.050 0.054 e 2.00 bsc 0.079 bsc e2 0.50 0.60 0.70 0.022 0.024 0.026 e 0.650 bsc 0.026 bsc l 0.25 0.30 0.35 0.009 0.011 0.013
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 12/14 old order, mark & packing information no. of pin en1 en2 package marking vout1 vout2 product id 3300 date code 3.0 3.0 emp2033-00vc06grr 3301 date code 1.8 3.0 emp2033-01vc06grr 3302 date code 1.8 2.8 emp2033-02vc06grr 3303 date code 2.5 3.3 emp2033-03vc06grr 3304 date code 2.8 3.3 EMP2033-04VC06GRR 3305 date code 1.8 3.3 emp2033-05vc06grr 6 y y sot-23-6 3306 date code 2.85 2.85 emp2033-06vc06grr
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 13/14 revision history revision date description 7.0 2009.04.03 1.title 2.ending 3.order information 4.add revision history form 5. important notice. 7.1 2009.10.30 1. update mark & packing information 2. add nrr 3. modify tdfn from 3x3 to 2x2 7.2 2010.03.18 update p11 bottom view drawing
esmt/emp emp2033 elite semiconductor memory technology inc./ elite micropower inc. publication date : mar. 2010 revision : 7.2 14/14 important notice all rights reserved. no part of this document may be repr oduced or duplicated in any form or by any means without the prior permission of esmt. the contents contained in this docume nt are believed to be accurate at the time of publication. esmt assumes no responsibility for any error in this document, and reserves the right to change the products or specification in this document without notice. the information contained herein is pr esented only as a guide or examples for the application of our products. no responsibility is assumed by esmt for any infringement of patents, copyrights, or other intellect ual property rights of third parties which may result from its use. no license, either express , implied or otherwise, is granted un der any patents, copyrights or other intellectual property righ ts of esmt or others. any semiconductor devices may have in herently a certain rate of failure. to minimize risks associated with cu stomer's application, adequate design and operating safeguards against inju ry, damage, or loss from such failure, should be provided by the customer when making application designs. esmt's products are not authorized for use in critical applications such as, but not limited to, life support devices or system, where failure or abnormal operation may directly affect human lives or cause physical injury or property damage. if products described here are to be used for such kinds of application, purchaser must do its own quality assurance testing appropriate to such applications.

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